Static memories, whether implemented as stand alone memory units or used in a processor register file or cache, typically comprise an array of memory cells arranged in rows and columns. In one such memory unit, the CMOS SRAM comprises two conductors called bit lines. The contents of memory cells are read by applying an input voltage to a selected word line, or row, and sensing which bit line experiences a change in voltage. The bit lines act as capacitors and are typically precharged to a predetermined voltage prior to reading the memory location. The state assumed by a selected memory cell determines which bit line, the true bit line or the complement bit line, will be discharged toward ground when the cell is read.
Typical prior art memories use a sense amplifier coupled to the bit lines to sense the state of the selected bit lines. One type of sense amplifier is a differential sense amplifier that has the bit lines as its inputs. The sense amplifier amplifies the voltage difference between the true and complement bit lines. If the difference between the bit lines is a positive value, the sense amplifier indicates that the memory cell is programmed to a first logical state. If the difference between the bit line voltages is a negative value, the sense amplifier indicates that the memory cell is programmed to a second logical state. The sense amplifiers are designed to sense within a narrow active range.
With increased performance requirements of computer systems, memory units with enhanced performance are required.
Thus, what is needed is a memory unit with faster access time.